15. Floating-Point Unit
15.4 Floating-Point Control Registers
The MIPS IV ISA permits up to 32 control registers to be defined for each coprocessor, but the Floating-Point Unit uses only two:
- Control register 0, the FP Implementation and Revision register
- Control register 31, the Floating-Point Status register (FSR)
Copyright 1995, MIPS Technologies, Inc. -- 29 JAN 96
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